Design Engineer (Job ID# 9542433 )

This job was posted by https://www.azjobconnection.gov : For more

information, please see: https://www.azjobconnection.gov/jobs/7501474

Qorvo US Inc., has a position in Chandler, Arizona.

DUTIES - Design core Analog/Mixed Signal and RF

circuits for mobile applications. This specifically involves working

with the design of Analog and Mixed signal circuits and with Cadence

design suite; porting reusable blocks from one process node to another

for TX Controller IC for smartphone RF module and making required

modifications to meet performance requirements; layout for the switch

driver, charge pumps, oscillators and others, clearing all DRC and LVS

errors; simulation of Comparators, Temp sensors, eFuse, PA bias DAC

voltage reference; and measuring post silicon performance parameters in

the lab using lab tools such as oscilloscope, signal generator, etc.

Additionally, Responsibilities Include Working With Run Block Level, Top

level and module level simulations on the designs for mobile

applications in order to meet the operational specifications, improve

yield and performance. Evaluate and characterize the design for mobile

applications and benchmark the performance. Lead the design from

conception to production working with multiple teams including module,

test and reliability engineering. Mentor interns and new employees in

meeting the design standards and work flow.

Hybrid Work Permitted: 3

days in the office and may work from a home office 2 days a week.

• MINIMUM REQUIREMENTS : Masters degree in Electrical Engineering with

a focus on analog and mixed signal circuit design, and 6 months of

experience or an internship to involve: (1) experience in the

semiconductor industry designing Analog and Mixed signal circuits and

Cadence design suite; (2) porting reusable blocks from one process node

to another for TX Controller IC for smartphone RF module and making

required modifications to meet performance requirements; (3) layout for

the switch driver, charge pumps, oscillators and others, clearing all

DRC and LVS errors; (4) simulation of Comparators, Temp sensors, eFuse,

PA bias DAC voltage reference; and (5) experience in measuring post

silicon performance parameters in the lab using lab tools such as

oscilloscope, signal generator, etc. Hybrid Work Permitted: 3 days in

the office and may work from a home office 2 days a week. Application Instructions: Send Resume to: ***email_hidden***

include Job Ref# 9542433** in the subject line. EOE.